all about JPE Address (16b) Bytes/m-cycles/t-states in microprocessor 8085 JZ Address , JNZ , LDA ?
JPE Address (16b)
Description : program execution is transferred to the memory address specified, if parity is even or P = 1. If P = 0, no transfer takes place.
Bytes/m-cycles/t-states:
3/2/7, if condition is not true
3/3/10, if condition is not true
Hex code : E2
Flags : no flags are affected.
JZ Address (16b)
Description : program execution is transferred to the memory address specified, if zero or Z = 1. If Z = 0, no transfer takes place.
Bytes/m-cycles/t-states
3/2/7, if condition is not true
3/3/10, if condition is true
Hex code : CA
Flags : No flags are affected.
JNZ Address (16b)
Description : program execution is transferred to the memory address specified, if not zero or Z = 0. If Z = 1, no transfer takes place.
Bytes/m-cycles/t-states
3/2/7, if condition is not true
3/3/10, if condition is true
Hex code : C2
Flags : no flags are affected
LDA Address (16b)
Description : the contents of the memory location specified are transferred to the accumulator.
Bytes/m-cycles/t-states : 3/4/13
Hex code : 3A
Flags: no flags are affected.
LDAX Rp
Description : the contents of the memory location pointed to by the register pair are loaded into the accumulator.
Bytes/m-cycles/t-states: 1/2/7
Hex codes : Register pair
0A BC
1A DE
Flags : no flags are affected.
LHLD Address (16b)
Description : the contents of the memory location specified are loaded into register L and the contents of the next memory location are loaded into register H.
Bytes/m-cycles/t-states : 3/5/16
Hex code : 2A
Flags : no flags are affected.
LXI Rp, Data (16b)
Description : The 16-bit data is loaded into the register pair.
Bytes/m-cycles/t-states : 3/3/10
Hex codes: Register pair
- BC
11 DE
21 HL
31 SP
Flags : no flags are affected.
MOV Rd, Rs
Description : the contents of the source register Rs are transferred into the destination register Rd.
Bytes/m-cycles/t-states : 1/1/4
Hex codes : source register
Flags no flags are affected.
MOV M, Rs
Description : the contents of the source register Rs are transferred to the memory location pointed to by HL.
Bytes/m-cycles/t-states 1/2/7
Hex codes source register
77 A
70 B
71 C
72 D
73 E
74 H
75 L
Flags no flags are affected.
MOV Rd, M
Description : the contents of the memory location pointed to by HL are transferred to the destination register.
Bytes/m-cycles/t-states : 1/2/7
Hex codes Destination register
7E A
46 B
4E C
56 D
5E E
66 H
6E L
Flags : no flags are affected.
MVI R, Data (8b)
Description : the 8 bits of data are stored in the register.
Bytes/m–cycles/t-states : 2/2/7
Hex codes Register
3E A
06 B
0E C
16 D
1E E
26 H
2E L
Flags : no flags are affected.
MVI, M Data (8b)
Description : the 8 bits of data are stored in the memory location pointed to by HL.
Bytes/m-cycles/t-states : 2/3/10
Hex code : 36
Flags : no flags are affected.
NOP
Description : no operation is performed. The instruction is fetched and decoded, but on operation is executed.
Bytes/m-cycles/t-states : 1/1/4
Hex code : 00
Flags : no flags are affected.
ORA R
Description : the contents of the accumulator are logically ORed with the contents of the register. The result is stored in the accumulator.
Bytes/m-cycles/t-states : 1/1/4
Hex codes Register
B7 A
B0 B
B1 C
B2 D
B3 E
B4 H
B5 L
Flags : Z, S and P are affected based upon the operation. AC and CY are reset.
ORA M
Description ; the contents of the accumulator are logically ORed with the contents of the memory location pointed to by HL.
Bytes/m–cycles/t-states : 1/2/7
Hex code : B6
Flags : Z,S and P are affected based upon the operation. AC and CY are reset.
ORI Data (8b)
Description : the contents of the accumulator are logically ORed with the 8 bits of data. The result is stored in the accumulator.
Bytes/m-cycles/t-states : 2/2/7
Hex code : F6
Flags : Z,S and P are affected based upon the operation. AC and CY are reset.
OUT Port Address (8b)
Description : the contents of the accumulator are copied out to the output port specified.
Bytes/m-cycles/t-states : 2/3/10
Hex code : D3
Flags : no flags are affected.
PCHL
Description : the contents of registers H and L are copied into and program counter. H is the high order bits and L is the low order bits.
Bytes/m-cycles/t-states : 1/1/6
Hex code : E9
Flags : no flags are affected.
POP Rp
Description : the contents of the memory location (stack) pointed to by the stack pointer are copied to the low order register of the register pair. (C,E,L and flags). The stack pointer is then incremented and the contents of that memory location being pointed to are copied to the high order register of the register pair.
Bytes/m-cycles/t-states : 1/3/10
Hex codes Register pair
C1 BC
D1 DE
E1 HL
F1 PSW
Flags : no flags are affected.
PUSH Rp
Description : the contents of the register pair are copied into the stack. The high order register (B,D,H,A) is put on the stack first, then the contents of the low order register (C,E,L, flags) are put onto the stack.
Bytes/m-cycles/t-states : 1/3/12
Hex codes Register pair
C5 B
D5 D
E5 H
F5 PSW
Flags : no flags are affected.
RAL
Description : the contents of the accumulator are rotated left by one position through the carry flag.
Bytes/m-cycles/t-states : 1/1/4
Hex code : 17
Flags : CY is modified according to bit D7. S, Z, P and AC are not affected.
RAR
Description : the contents of the accumulator are rotated right by one position through the carry flag.
Bytes/m-cycles/t-states : 1/1/4
Hex code : 1F
Flags : CY is modified according to bit D0. S,Z,P and AC are not affected.
RLC
Description : the contents of the accumulator are rotated left by one position. Bit D7 is placed in both D0 and CY.
Bytes/m-cycles/t-states : 1/1/4
Hex code : 07
Flags : CY is modified according to bit D7, S,Z,P and AC are not affected.
RRC
Description : the contents of the accumulator are rotated right by 1 bit. Bit D0 is placed in both D7 and CY at the same time.
Bytes/m-cycles/t-states : 1/1/4
Hex code : 0F
Flags : CY is modified according to bit D0. S,Z,P and AC are not affected.
RET
Description : the program sequence is transferred from the subroutine to the calling program. The two bytes from the top of the stack are copied into the program counter and this is the address that program execution begins.
Bytes/m-cycles/t-states : 1/3/10
Hex code : C9
Flags : no flags are affected.
RC
Description : the program sequence is transferred from the subroutine to the calling program if the carry flag is set or CY = 1. If CY = 0, no transfer takes place.
Bytes/m-cycles/t-states
1/1/6, if condition is not true
1/3/12, if condition is true
Hex code : D8
Flags : no flags are affected.
RNC
Description : the program sequence is transferred from the subroutine to the calling program if the carry flag is not set or CY = 0. If CY = 1, no transfer takes place.
Bytes/m-cycles/t-states
1/1/6, if condition is not true
1/3/12, if condition is true
Hex code : D0
Flags : no flags are affected.
RP
Description : the program sequence is transferred from the subroutine to the calling program if positive, or S =0. If S = 1, no transfer takes place.
Bytes/m-cycles/t-states
1/1/6, if condition is not true
1/3/12, if condition is true
Hex code : F0
Flags : no flags are affected.
RM
Description : the program sequence is transferred from the subroutine to the calling program if minus or S = 1. If S = 0, no transfer takes place.
Bytes/m-cycles/t-states
1/1/6 , if condition is not true
1/3/12, if condition is true
Hex code : F8
Flags : no flags are affected.
RPE
Description : the program sequence is transferred from the subroutine to the calling program if the parity is even or P = 1. If P = 0, no transfer takes place.
Bytes/m-cycles/t-states
1/1/6, if condition is not true
1/3/12, if condition is true
hex code : E8
Flags : no flags are affected.
RPO
Description : the program sequence is transferred from the subroutine to the calling program if the parity is odd or P = 0. If P = 1, no transfer takes place.
Bytes/m-cycles/t-states
1/1/6, if condition is not true
1/3/12, if condition is true
Hex code : E0
Flags : no flags are affected.
RZ
Description : the program sequence is transferred from the subroutine to the calling program if zero or Z = 1. If Z = 0, no transfer takes place.
Bytes/m-cycles/t-states
1/1/6. If condition in not true
1/3/12, if condition is true
Hex code : C8
Flags : no flags are affected.
RNZ
Description : the program sequence is transferred from the subroutine to the calling program if not zero or Z = 0. If Z = 1, no transfer takes place.
Bytes/m-cycles/t-states
1/1/6, if condition is not true
1/3/12, if condition is true
Hex code : C0
Flags : no flags are affected.
RIM
Description : this instruction is used to both read in the status of interrupts 7.5, 6.5 and 5.5 as well as to read in the serial input data bit. An 8-bit word is read in and stored in the accumulator. The layout of that word is shown in figure given below.
Bytes/m-cycles/t-states : 1/1/4
Hex code : 20
Flags : no flags are affected.
RST n (where n = 0-7)
Description : this instruction operates like a call instruction that goes to one of eight predetermined memory locations on page 0. Each instruction (RST 0-RST 7) goes to a specific address listed next.
Instruction Restart Address
RST 0 0000
RST 1 0008
RST 2 0010
RST 3 0018
RST 4 0020
RST 5 0028
RST 6 0030
RST 7 0038
Bytes/m-cycles/t-states : 1/3/12
Hex codes : C7 RST 0
CF RST 1
D7 RST 2
DF RST 3
E7 RST 4
EF RST 5
F7 RST 6
FF RST 7
Flags : no flags are affected.
SSB R
Description : the contents of the register and the borrow flag are subtracted from the contents of the accumulator and the results are stored in the accumulator.
Bytes/m-cycles/t-states : 1/1/4
Hex codes Register
9F A
98 B
99 C
9A D
9B E
9C H
9D L
Flags : all flags are affected based upon the results of the operation.
SBB M
Description : the contents of the memory location pointed to by HL and the borrow flag are subtracted from the contents of the accumulator. The results are then stored in the accumulator.
Bytes/m-cycles/t-states : 1/2/7
Hex code : 9E
Flags : All flags are affected based upon the results of the operation.
SBI Data (8b)
Description : the 8 bits of data and the borrow flag are subtracted from the accumulator and the results are stored in the accumulator.
Bytes/m-cycles/t-states : 2/2/7
Hex code : DE
Flags : All flags are affected based upon the results of the operation.
SHLD Address (16b)
Description : the contents of register L are stored at the memory location specified and the contents of register H are stored at the next memory location by incrementing the operand by 1.
Bytes/m-cycles/t-states : 3/5/16
Hex code : 22
Flags : no flags are affected.
SIM
Description : this is an instruction that is used to set the interrupt makes as set the serial output data bit. The accumulator is laid out as shown in figure given below.
Bytes/m-cycles/t-states : 1/1/4
Hex code : 30
Flags : no flags are affected.
SPHL
Description : the contents of registers H and L are loaded into the stack pointer. H has the high-order part of the address, while L has the low order portion.
Bytes/m-cycles/t-states : 1/1/6
Hex code : F9
Flags : no flags are affected.