Stability Factor | types of stability factor | what is stability factor mcq | bias stability of transistor

Stability Factor | types of stability factor | what is stability factor mcq | bias stability of transistor ? comparing fixed and collector to base bias which of the following statement is true ?
Stability of Quiescent Operating Point
Lat us assume that the transistor is replaced by an other transistor of same type. the BDC of the two transistors of same type may not be same. therefore, if BDC increases then for same IB, output characteristic shifts upward. if BDC decreases, the output characteristic shifts downeard. since, IB is maintained constant therefore, the operating point shifts Q to Q1 as shown in fig. 13. the new operating point may be completely unsatifactory.
maintain VCE and IC constant as BDC changes.
A second cause for bias instability is a variation in temperature. the reverse saturation current changes with temperature. specifically,ICO doubles for every 100C rise in temperature. the collector current IC causes the collector junction temperature to rise, which in turn increases ICO. As a result of this growth ICO, IC will increase {BDC IB + (1 + BDC) ICO} and so on. it may be possible that this process goes on and the ratings of the transistor are exceeded. this increases in IC changes the characteristic and hence, the operating point.
Stability Factor
The operating point can be made stable by keeping IC and VCE constant. there are two lechniques to make Q point stable

  1. stabilization techniques
  2. Compensation techniques

In first, resistor beasing circuits are used which allows IB to vary so as to keep IC relatively constant with variations in BDC, ICO and VBE.
In second, temperature sensititive such as diodes, transistors are used which provide compensating voltage and current to maintain the operating point constant.
To compare different biasing circuits, stability factor S is defined as the rate of change of collector current with respect to the ICO, keeping  BDC and VCE constant.
S = IC / ICO
If S is large, then circuit is thermally instable. S cannot be less than unity. the other stability factors are IC / BDC and IC / VBE. The bias circuit, which provide stability with ICO, also shows stability even if B and VBE change.
Differentiating with respect to IC,
1 = BDC IB/IC + (1 + BDC) / S
S = 1 + BDC/ IB
1 – BDC  / IC
In fixed bias circuit, IB and IC are independent.
Therefore, IB / IC = 0 and S= 1 + BDC. If BDC = 100, S =101, wgich means IC increases 101 times as fast as ICO. Such as large change definitely operate the transistor in saturation.
Emitter Feedback Bias
Fig . 14 shows the emitter feedback bias circuit in this circuit, the voltage across resistor RE is used to offset the changes in BDC. if BDC increases, the collector current increases. this increases the emitter voltage which decreases the voltage across base resistor and reduces base current. the redued base current resulys in less collector current, which partially offsets the original increase in BDC . the feedback term is used because output current (IC) produces a change in input current (IE). RE is common in input and output circuits.
In this case,
Since                IE = IC + IB
IB / IC = RE / RB + RE
S = 1 + BDC << (1 + BDC)
1 + BDC (RE / RB + RE)
In this case, S is less compared to fixed bias circuits. thus, the stability of the Qpoint is better.
If     IC is to made insensitive to BDC then,
RE >> RB / BDC
RE cannot be made large enough to swamp out the effects of BDC without saturating the transistor.
Collector Feedback Bias
In this case, the base resistor is retumed back to collector as shown in fig. 15. if temperature increases. BDC increases. this produces more collector current. As IC increases, collector-emitter voltage decreases. it means less voltage across RB and causes a decrease in base current. this decreases IC and compensating the effect of BDC.
In this circuit, the voltade equqtion is given by
Circuit is stiff sensitive to change in BDC. The advantage is that only two resistors are used. then.
IB / IC = – RC / RB + RC
S =    1 + BDC  < 1 + BDC < 1 + BDC
1 + RCBDC / RB + RC      1 + B  RE / RB
it is better as compare to fixed bias circuit.
Further,                    IC = VCCVBE
RC + RB  / BDC
Circuit is still sensitive to change in BDC. The advantage is that only two resistors are used.
Voltage Divider Bias
If the load resistance RC is very samll e.g., in a transformer coupled circuit, then there is no improvement in stabilization in the collector to base bias circuit over fixed bias circuit. A circuit which can be used even if there is no DC resistance in series with the collector, is the voltage devider bias or self bias.
The current in the resistance RE in the emitter lead causes a voltage drop which in the direction to reverse bias the emitter junction. since, this jusction must be forward biased, the base voltage is obtained from the supply through R1 , R2 network. if RB = R1 || R2 equivalent resistance is very – very small, then VBE voltage is independent of ICO and ICO. For best stability, R1 and R2 must be kept small.
If IC tends to increase, because of ICO, then the current in RC increases, hence base current is decreased because of more reverse biasing and it reduces IC.
To analyze this circuit, the base circuit is replaced by its thevenin’s equivalent as shown in fig. 16. (a).
Thevenin’s voltage is
V = R2 / R1 + R2 = VCC
RB = R1R2 / R1 + R2
RB is the effective resistance seen back from the base terminal.
V = IBRB + VBE + (IB + IC) RE
If VBE is considered to be independent of IC then,
IB / IC = – RE / RB + RE
S = 1 + BDC
1 + BDCRE / RB + RE
If               RB /RC = 0, then  S = 1
If              RB/RC = OO, then S = (1 + BDC)
The smaller the value of RB‘ the better is the stabilization but S cannot be reduced by unity.
Hence. IC always increases more than ICO. If RB is reduced then current drawn from the supply increases, also if RE is increased then to operate at same Q point, the magnitude of VCC must be increased in both the cases the power loss increased and reduced h.
In order to avoid the loss of AC signal because of the feedback caused by RE, this resistance is often by passed by a large capacitance (> 10 mF) so that its reactance at the frequency under consideration is very small.
Emitter Bias
Fig. 17 shows the emitter bias circuit.the circuit gets this name because the negetive supply VEE is used to forward bias the emitter junction through resistor RE. VCC still reverse biases collector junction. this also gives the same stability as voltage divider circuit but it is used only if split supply is available.
In this circuit, the voltage equation is given by
Therefore,      IB = IC / BDC = IE / BDC
If IC or IE is to be independent of B then,
RE >> RB / BDC
Then,    IE = VEE– VBE / RE
This shows that emitter is virtually at ground potential.
Normally, RB is selected less than 0.01 BDC RE.
Example 5. Determine the Q point for CE amplifier given in figure. if R1 = 1.5 k and RS = 7 k. A transistor is used with B = 180, RE = 100 and  RC = RIoad = 1 k. Also determine the Pout (AC) and the DC power delivered to the circuit by the source.
Sol. We first obtained the thevenin’s equivaent.
VBB = R1 / R1 + R2 = VCC
= 1500 / 1500 + 7000 x 5 = 0.882 v
and           RB = R1R2 / R1 + R2 = 1.24 K
ICQ = VBB – VBE / RB/ B + RE = 0.882 – 0.7 / 1240/180 + 100
Note that this is not a desirable Q point location. since VBB is very close to VBE. Variation in VBE therefore, significantly change IC. We find RAC = RC||Rload = 500 and RDC = RC + RE = 1.1K. The value of VCE representing the quiescent value associated with ICQ is found as follows:
= 5 – (1. 70×10 -3) (1.1 x 10-3) = 3.13 V
Then,       VCC = VCE,Q + ICQ RAC
= 3.13 + (1.7 x 10-3) (500) = 3.98 V
Since, the Qpoint is on the lower half of the AC load line, the maximum possible symmrtrical output voltage swing is
2 (ICQ – 0) (RC||Rload) = 2 (1.70×10-3) (500) = 1.70VP-P
The AC power output can be calculated as
Pout (AC) = 1/2 I2load = 1/2 (1.7×10-3x1000/2000)2x1000
The power drawn from the DC source is given by
Pvcc (DC) = ICQVCQ + V2CC/R1 +R2 = 11.4 mW
The power loss in the transistor is given by
Ptransistor = vce, Q ICQ = 3.13×1.70
= 5.32mW
The Q point in this example is not in the middle of the load line so that output swing is not as great as possible. however, if the input signal is small and maximum output is not required a small IC can be used to reduce the power dissipated in the circuit.
Moving Ground Around
Ground is a reference point that can be moved around, e.g., consider a collector feedback bias circuit. the various stages of moving ground are shown in fig. 18.
Biasing a p-n-p Transistor
The biasing of p-n-p transistor is done similar to n-p-n transistor except that suppiy is of opposite polarity the various biasing circuits of p-n-p transmitter are shown in fig. 19.
Example 6. For the circuit shown in figure, calculate IC and VCE.
sol. Voltage across 1k resistor = 1/3 x30 =10 v
Therefore,           IC ~ IE = 10 – 0.7 / 2 = 9.3 /2 = 4.65 mA
Therefore,             VC = 465×3
= 13.95 v
AC Load Line
Consider a DC equivalent circuit given in fig. 20 (a). Assume IC = IC (approximately), the output circuit voltage equation can be written as
VCE = VCC – IC (RC + RE)
and            IC = -VCE / RC + RE + VCC / RC + RE
VCE = 0, IC = VCC / RC + RE
and       IC = 0, VCE = VCC
The slop of the DC load line is  -1 /RC + RE            When
considering the AC equivalent circuit, the output impedance becomes RC||RL which is less than (RC + RE).
In the absence of AC signal, this load line passes through Q point. therefore, AC load line is a line of slope {-1/(RC||RL)} passing through Q point. through Q point. therefore. the output voltage fluctuations will be now corresponding to AC load line as shown in fig. 20 (b). under this condition, Q point is not in the maddle of load line therefore, Q point is sescted slightly upwaed, means slightly shifted to saturation side.
Voltage Gain
To find the voltage gain, consider an unloaded CE amplifier. the AC equivalent circuit is shown in fig. 21. the transistor can be replaced by its collector equivalent mosel i.e., a current source and emitter diode which offers AC resistance R’E.
The input voltage appears directly across the emitter diode.
Therefore, emitter current IE = Vin/R’E
Since, collector current approximately equals emitter current IC = IE and Vout = – IERC (the minus sign is used here to indicate phase inversion)
Further Vout = – (VinRC) /R’E
Therefore, voltage gain A = Vout / Vin = – RC/R’E
The AC source driving an amplifier has to supply alternating current to the amplifier. the input impedance of an amplifier determines how much current the amplifier takes from the AC source.
In a normal frequency range of an amplifier, where all capacitors look like AC shorts and  other reactances are negligible, the AC input impedance is defined as
Z = Vin/ Iin
Where,Vin and Iin are peak-to-peak values or rms values. the impedance looking directly into the base is symbolized Zin (base) and is given by
Zin (base) = Vin/ IB
Since,           Vin = IER’E
Zin (base) = BR’E
From the AC equivalent circuit, the input impedance Zin is the parallel combination of R1 and R2 and BR’E
i.e.,                      Zin = R1||R2||BR’E
The thevenin voltage appearing at the output is
Vout = AVin
The thevenin impedance is the parallel combination of RC and the internal impedance of the current source. the collector current source is an ideal source therefore, it has an infinite internal impedance.
Zout = RC
The simplified AC equivalent circuit is shown in fig. 22.
Example 7. Select R1 and R2 for maximum output voltage swing in the circuit shown in figure.
Sol. We first determine ICQ for the circuit.
RAC = RC ||Rload = 500
RDC = RE + RC = 1100
ICQ = VCC / RAC + RDC = 5/500+1100
= 3.13 mA
For maximum  swing,                     V’CC = 2VCE.Q
The quiescent value for VCE is given by
VCE.Q  = (3.13) (500) = 1.56 V
The intersection of the AC load line on the VCE axis is V’CC = 3.13 V from the manufacturer’s specifiction B for the 2N3904 is 180. RB is set equal to 0.1 B RE. So,
RB = 0.1 (180) (100) = 1.8 KW
VBB = (3.13×10-3) (1.1×100) + 0.7 = 1.044 V
Since, we know VBB and RB, we find R1 and R2
R1 = RB / 1-VBB/VCC = 1800/ 1.044 = 2.28 K
R2 = RBVCC/ VBB = 1800×5 /1.044 = 8.62 k
The maximum output voltage swing ignoring the non-linearity at saturetion and cut-off would be maximum collector current swing = 2 ICQ (RC||Rlout)
= 2 (3.13) (500)
= 3.13 V
The load lines are shown on the characteristics of the figure.
The maximum power dissipated by the transistor is calculated to assure that it does not exceed the specifications. the maximum average power dissipated in the transistor is
P(transistor) = VCE.QICQ = (1.56) (3.13)
= 4.87 mW
This is well within the 350 mW maximum given on the specification sheet. the maximum conversion efficiency is
n = pout (AC) / PVCC (DC) = (3.13×10-3/2)2 x 1000/2×100 / 5×3.13×10-3+5/10.9×10-3
= 6.84%
The Swamped Amplifier
The AC resistance of the emitter diode R’E equals 25 mV/IE and depends on the temperature. any change in R’E will change the voltage gain in CE amplifier. in some applications, a change in voltage is acceptable. but in many applications we need a stable voltage gain is required.
To make it stable, a resistance RE is inserted in series with the emitter and therefore, emitter is longer AC grounded fig. 23.
Because of this the AC emitter current flows through RE and produces an AC voltage at the emitter, if RE is much greater than R’E almost all of the AC input signals appear at the emitter and the emitter is bootstrapped to the base for AC as well as  for DC.
In this case, the collector current is given by
IC = Vin / R’E + RE
and           Vout = – IC RC
Therefore,              A = Vout / Vin = – ICRC / IC (R’E+RE)
= -RC/ R’E + RE
Now, R’E has a less effect on voltage gain, swamping means RE>> R’E if swamping is less, voltage gain varies with temperature. if swamping is heavy, then gain reduces very much.

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